Natalie Enright Jerger, Ph.D, P.Eng_..jpg

Natalie Enright Jerger, Ph.D, P.Eng.

Associate Professor, Electrical and Computer Engineering, University of Toronto

In her brief career, Dr. Natalie Enright Jerger has already emerged as one of the top computer architecture researchers of her generation.

Since joining the Electrical and Computer Engineering Department at the University of Toronto as an Assistant Professor in January 2009, she has launched an active and successful research program and is building a strong team of graduate students.

She has already achieved significant success in her research, which focuses on on-chip networks. This is an active and vibrant area in computer architecture today, driven by the dramatic shift away from increasing processor speeds to replicating processor cores. One of the main challenges of the research community is how to connect an increasing number of cores in an energy-efficient way. The research of Dr. Enright Jerger directly addresses this challenge through innovations in on-chip networks to provide scalable communication and scalable and better performing computing systems. Her research contributions have demonstrated an innovative yet thoughtful approach to challenging problems in the design of future microprocessor chips with a specific focus on the relatively new problem of interconnecting multiple cores on a single processor die.

This work has attracted significant funding from various granting agencies and, more importantly, from relevant partners in industry, such as Intel, AMD and Qualcomm. This level of funding reflects her ability to innovate and influence future industry directions.

Dr. Enright Jerger is deeply committed to mentorship and outreach initiatives and has been very active in the greater research community. As program chair for the 20th International Symposium on High-Performance Computer Architecture in February 2014, she was the first woman and youngest chair in the history of the program, which is one of the premier venues for publishing computer architecture research.